Hopefully final changes

This commit is contained in:
Lauri Võsandi 2017-08-09 01:27:36 +03:00
parent aaba09e9e3
commit fe1b99dc0f
11 changed files with 9248 additions and 5331 deletions

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@ -14,18 +14,18 @@ $ENDFPLIST
DRAW
T 0 0 550 50 0 1 0 BCD/DEC Normal 0 C C
S -200 600 200 -550 1 1 10 f
X 9 10 450 -350 250 L 50 50 1 1 C V
X 0 9 450 -450 250 L 50 50 1 1 C V
X 9 9 450 -350 250 L 50 50 1 1 C V
X 0 10 450 -450 250 L 50 50 1 1 C V
X A 3 -350 150 150 R 50 50 1 1 I
X D 4 -350 250 150 R 50 50 1 1 I
X VCC 5 0 400 150 D 50 50 1 1 W N
X B 6 -350 350 150 R 50 50 1 1 I
X C 7 -350 450 150 R 50 50 1 1 I
X 3 15 450 250 250 L 50 50 1 1 C V
X 4 1 450 150 250 L 50 50 1 1 C V
X 5 16 450 150 250 L 50 50 1 1 C V
X 8 8 450 -250 250 L 50 50 1 1 C V
X 7 11 450 -150 250 L 50 50 1 1 C V
X 5 16 450 50 250 L 50 50 1 1 C V
X 4 1 450 50 250 L 50 50 1 1 C V
X 6 13 450 -50 250 L 50 50 1 1 C V
X 2 2 450 350 250 L 50 50 1 1 C V
X 1 14 450 450 250 L 50 50 1 1 C V

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@ -5,11 +5,11 @@
# * Use resulting bla_front.ngc, bla_drill.ngc, bla_back.ngc files
PROJECT=nixiesp
MILL_FEED=500
DRILL_FEED=500
MILL_FEED=70
DRILL_FEED=70
SPINDLE_SPEED=6000
FINISH_HEIGHT=40
DRILL_DEPTH=5
DRILL_DEPTH=8
# Tiling
TILING_X=1
@ -20,22 +20,20 @@ all: ${PROJECT}_drill.ngc
%_drill.ngc: %.drl %-F.Cu.gtl %-B.Cu.gbl
pcb2gcode \
--zero-start \
--onedrill \
--software linuxcnc \
--tile-x ${TILING_X} \
--tile-y ${TILING_Y} \
--front $*-F.Cu.gtl \
--back $*-B.Cu.gbl \
--drill $*.drl \
--outline $*-Edge.Cuts.gm1 \
--front-output $*_front.ngc \
--back-output $*_back.ngc \
--drill-output $*_drill.ngc \
--metric \
--metricoutput \
--zsafe 3 --zchange ${FINISH_HEIGHT} --zcut 0 \
--zsafe 1 --zchange ${FINISH_HEIGHT} --zcut 0 \
--cutter-diameter 5 --cut-feed ${MILL_FEED} --cut-speed ${SPINDLE_SPEED} --cut-infeed ${MILL_FEED} \
--zwork 0 --offset 0.2 --mill-feed ${MILL_FEED} --mill-speed ${SPINDLE_SPEED} \
--zwork -0.2 --offset 0.1 --mill-feed ${MILL_FEED} --mill-speed ${SPINDLE_SPEED} \
--zdrill -${DRILL_DEPTH} --drill-feed ${DRILL_FEED} --drill-speed ${SPINDLE_SPEED}
clean:

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@ -1,22 +1,30 @@
# NixiESP
# NixiESP12
## Intro
Yet another Nixie clock project!
Some highlights:
* K155ID1 driven IN-12A or IN-12B tubes for hour, minute, seconds
* BS107 driven IN-6 or similar for separation
* ESP8266 for time synchronization and web interface
* LM1117 (3.3V regulator) for logic power supply
* No tube step up converter on-board, pin headers for connecting third party power supply
* BS107 driven IN-6 or similar for digit separation
* 74HC595 for serial to parallel conversion
* ESP8266 for time synchronization
* LM1117-3.3V and LM1117-5V regulators for logic power supply
* No tube step up converter on-board, pin headers for connecting
<a href="http://www.ebay.com/itm/DC-5V-12V-to-170V-DC-High-Voltage-NIXIE-Power-Supply-Module-PSU-NIXIE-TUBE-ERA-/322511957768?hash=item4b1735ef08">third party power supply</a>
* KiCad design with 3D models from http://miniwatt.info
Some KiCad screenshots:
<img src="nixiesp.png"/>
Photos:
##Install
<img src="photo.jpg"/>
## Install
Boot ESP8266 with program pin held low and flash MicroPython:
@ -26,3 +34,15 @@ esptool.py --port /dev/ttyUSB0 --baud 460800 write_flash --flash_size=detect 0 e
```
Upload main.py and boot.py and adjust network configuration in boot.py accordingly.
## Assembly tips
Some cheap 1117V regulators don't offer short circuit protection
and once blown pass through input voltage,
make sure you get ones with protection otherwise you can fry ESP8266
or serial-to-parallel chips.
Once the PCB is milled or etched make sure you clean the 180V rails thoroughly,
that voltage is high enough to cross gaps of 0.1mm.
Once that happens it burns a thick dark trace into the fiberglass of PCB and
it's pretty tricky to clean up.

66
main.py
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@ -4,19 +4,8 @@ from machine import Pin, Timer
clock = Pin(3, mode=Pin.OUT)
latch = Pin(0, mode=Pin.OUT)
data = Pin(2, mode=Pin.OUT)
lut = [
0b1011, # 0
0b1001, # 1
0b1100, # 2
0b1000, # 3
0b0000, # 4
0b0100, # 5
0b0001, # 6
0b0011, # 7
0b0010, # 8
0b1010, # 9
]
blink = 0
lookup = 11, 9, 12, 8, 0, 4, 1, 3, 2, 10
def bitbang_bit(value):
if value & 1:
@ -26,15 +15,13 @@ def bitbang_bit(value):
clock.on()
clock.off()
def bitbang_digit(digit, width=4):
def bitbang_digit(digit):
bitbang_bit(blink)
for i in range(0,width):
bitbang_bit(lut[digit] << i << 1 >> width)
def bitbang_latch():
latch.on()
latch.off()
state = 0
bitbang_bit(lookup[digit] << i >> 3)
bitbang_bit(blink)
bitbang_bit(blink)
bitbang_bit(blink)
timer = Timer(-1)
@ -45,49 +32,20 @@ def schedule(delay=0):
dump()
def dump_time(hour, minute, second):
bitbang_bit(state)
bitbang_digit(hour // 10)
bitbang_bit(state)
bitbang_bit(state)
bitbang_bit(state)
bitbang_bit(state)
bitbang_digit(hour % 10)
bitbang_bit(state)
bitbang_bit(state)
bitbang_bit(state)
bitbang_bit(state)
bitbang_digit(minute // 10)
bitbang_bit(state)
bitbang_bit(state)
bitbang_bit(state)
bitbang_bit(state)
bitbang_digit(minute % 10)
bitbang_bit(state)
bitbang_bit(state)
bitbang_bit(state)
bitbang_bit(state)
bitbang_digit(second // 10)
bitbang_bit(state)
bitbang_bit(state)
bitbang_bit(state)
bitbang_bit(state)
bitbang_digit(second % 10)
bitbang_bit(state)
bitbang_bit(state)
bitbang_bit(state)
def dump(t=None):
global state
global blink
year, month, day, hour, minute, second, _, millis = localtime()
dump_time((hour + 3) % 24, minute, second)
bitbang_latch()
state = 1-state
latch.on()
latch.off()
blink = 1-blink
schedule(1000-millis)
schedule()

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@ -63,6 +63,26 @@ X S 3 100 -200 100 U 50 50 1 1 P
ENDDRAW
ENDDEF
#
# CONN_01X01
#
DEF CONN_01X01 J 0 40 Y N 1 F N
F0 "J" 0 100 50 H V C CNN
F1 "CONN_01X01" 100 0 50 V V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
Pin_Header_Straight_1X*
Pin_Header_Angled_1X*
Socket_Strip_Straight_1X*
Socket_Strip_Angled_1X*
$ENDFPLIST
DRAW
S -50 5 10 -5 0 1 0 N
S -50 50 50 -50 0 1 0 N
X P1 1 -200 0 150 R 50 50 1 1 P
ENDDRAW
ENDDEF
#
# CONN_01X02
#
DEF CONN_01X02 J 0 40 Y N 1 F N
@ -85,6 +105,96 @@ X P2 2 -200 -50 150 R 50 50 1 1 P
ENDDRAW
ENDDEF
#
# CONN_01X05
#
DEF CONN_01X05 J 0 40 Y N 1 F N
F0 "J" 0 300 50 H V C CNN
F1 "CONN_01X05" 100 0 50 V V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
Pin_Header_Straight_1X*
Pin_Header_Angled_1X*
Socket_Strip_Straight_1X*
Socket_Strip_Angled_1X*
$ENDFPLIST
DRAW
S -50 -195 10 -205 0 1 0 N
S -50 -95 10 -105 0 1 0 N
S -50 5 10 -5 0 1 0 N
S -50 105 10 95 0 1 0 N
S -50 205 10 195 0 1 0 N
S -50 250 50 -250 0 1 0 N
X P1 1 -200 200 150 R 50 50 1 1 P
X P2 2 -200 100 150 R 50 50 1 1 P
X P3 3 -200 0 150 R 50 50 1 1 P
X P4 4 -200 -100 150 R 50 50 1 1 P
X P5 5 -200 -200 150 R 50 50 1 1 P
ENDDRAW
ENDDEF
#
# CONN_01X06
#
DEF CONN_01X06 J 0 40 Y N 1 F N
F0 "J" 0 350 50 H V C CNN
F1 "CONN_01X06" 100 0 50 V V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
Pin_Header_Straight_1X*
Pin_Header_Angled_1X*
Socket_Strip_Straight_1X*
Socket_Strip_Angled_1X*
$ENDFPLIST
DRAW
S -50 -245 10 -255 0 1 0 N
S -50 -145 10 -155 0 1 0 N
S -50 -45 10 -55 0 1 0 N
S -50 55 10 45 0 1 0 N
S -50 155 10 145 0 1 0 N
S -50 255 10 245 0 1 0 N
S -50 300 50 -300 0 1 0 N
X P1 1 -200 250 150 R 50 50 1 1 P
X P2 2 -200 150 150 R 50 50 1 1 P
X P3 3 -200 50 150 R 50 50 1 1 P
X P4 4 -200 -50 150 R 50 50 1 1 P
X P5 5 -200 -150 150 R 50 50 1 1 P
X P6 6 -200 -250 150 R 50 50 1 1 P
ENDDRAW
ENDDEF
#
# CONN_01X07
#
DEF CONN_01X07 J 0 40 Y N 1 F N
F0 "J" 0 400 50 H V C CNN
F1 "CONN_01X07" 100 0 50 V V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
Pin_Header_Straight_1X*
Pin_Header_Angled_1X*
Socket_Strip_Straight_1X*
Socket_Strip_Angled_1X*
$ENDFPLIST
DRAW
S -50 -350 50 350 0 1 0 N
S -50 -295 10 -305 0 1 0 N
S -50 -195 10 -205 0 1 0 N
S -50 -95 10 -105 0 1 0 N
S -50 5 10 -5 0 1 0 N
S -50 105 10 95 0 1 0 N
S -50 205 10 195 0 1 0 N
S -50 305 10 295 0 1 0 N
X P1 1 -200 300 150 R 50 50 1 1 P
X P2 2 -200 200 150 R 50 50 1 1 P
X P3 3 -200 100 150 R 50 50 1 1 P
X P4 4 -200 0 150 R 50 50 1 1 P
X P5 5 -200 -100 150 R 50 50 1 1 P
X P6 6 -200 -200 150 R 50 50 1 1 P
X P7 7 -200 -300 150 R 50 50 1 1 P
ENDDRAW
ENDDEF
#
# CONN_02X04
#
DEF CONN_02X04 J 0 1 Y N 1 F N
@ -187,27 +297,6 @@ X K K 300 0 100 L 40 40 1 1 B
ENDDRAW
ENDDEF
#
# LED
#
DEF LED D 0 40 Y N 1 F N
F0 "D" 0 100 50 H V C CNN
F1 "LED" 0 -100 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
LED*
$ENDFPLIST
DRAW
P 2 0 1 8 -50 -50 -50 50 N
P 2 0 1 0 -50 0 50 0 N
P 4 0 1 8 50 -50 50 50 -50 0 50 -50 N
P 5 0 1 0 -120 -30 -180 -90 -150 -90 -180 -90 -180 -60 N
P 5 0 1 0 -70 -30 -130 -90 -100 -90 -130 -90 -130 -60 N
X K 1 -150 0 100 R 50 50 1 1 P
X A 2 150 0 100 L 50 50 1 1 P
ENDDRAW
ENDDEF
#
# LM1117-ADJ
#
DEF LM1117-ADJ U 0 30 Y Y 1 F N

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@ -1,91 +0,0 @@
(rules PCB nixiesp
(snap_angle
fortyfive_degree
)
(autoroute_settings
(fanout off)
(autoroute on)
(postroute on)
(vias on)
(via_costs 50)
(plane_via_costs 5)
(start_ripup_costs 100)
(start_pass_no 391)
(layer_rule F.Cu
(active on)
(preferred_direction horizontal)
(preferred_direction_trace_costs 1.0)
(against_preferred_direction_trace_costs 3.9)
)
(layer_rule B.Cu
(active on)
(preferred_direction vertical)
(preferred_direction_trace_costs 1.0)
(against_preferred_direction_trace_costs 1.4)
)
)
(rule
(width 500.0)
(clear 200.2)
(clear 250.0 (type smd_to_turn_gap))
(clear 50.0 (type smd_smd))
)
(padstack "Via[0-1]_600:400_um"
(shape
(circle F.Cu 600.0 0.0 0.0)
)
(shape
(circle B.Cu 600.0 0.0 0.0)
)
(attach off)
)
(via
"Via[0-1]_600:400_um" "Via[0-1]_600:400_um" default
)
(via
"Via[0-1]_600:400_um-kicad_default" "Via[0-1]_600:400_um" "kicad_default"
)
(via_rule
default "Via[0-1]_600:400_um"
)
(via_rule
"kicad_default" "Via[0-1]_600:400_um-kicad_default"
)
(class default
(clearance_class default)
(via_rule default)
(rule
(width 500.0)
)
(circuit
(use_layer F.Cu B.Cu)
)
)
(class "kicad_default"
GND "Net-(U1-Pad1)" "Net-(U1-Pad3)" "Net-(U1-Pad5)" "Net-(U1-Pad7)" VCC "Net-(U4-Pad3)" "Net-(U4-Pad6)"
"Net-(U4-Pad7)" "Net-(U5-Pad4)" "Net-(U5-Pad5)" "Net-(U5-Pad7)" "Net-(N1-Pad0)" "Net-(N1-Pad1)" "Net-(N1-Pad3)" "Net-(N1-Pad4)"
"Net-(N1-Pad5)" "Net-(N1-Pad6)" "Net-(N1-Pad7)" "Net-(N2-Pad0)" "Net-(N2-Pad1)" "Net-(N2-Pad3)" "Net-(N3-Pad0)" "Net-(N3-Pad1)"
"Net-(N3-Pad3)" "Net-(N3-Pad4)" "Net-(N3-Pad5)" "Net-(N3-Pad6)" "Net-(N3-Pad7)" "Net-(N4-Pad0)" "Net-(N4-Pad1)" "Net-(N4-Pad3)"
"Net-(N4-Pad4)" "Net-(N4-Pad5)" "Net-(N4-Pad6)" "Net-(N4-Pad7)" "Net-(N5-Pad0)" "Net-(N5-Pad1)" "Net-(N5-Pad3)" "Net-(N5-Pad4)"
"Net-(N5-Pad5)" "Net-(N5-Pad6)" "Net-(N5-Pad7)" "Net-(N6-Pad0)" "Net-(N6-Pad1)" "Net-(N6-Pad4)" "Net-(N6-Pad5)" "Net-(N6-Pad6)"
"Net-(N6-Pad7)" "Net-(N1-Pad2)" "Net-(N2-Pad2)" "Net-(N3-Pad2)" "Net-(N4-Pad2)" "Net-(N5-Pad2)" "Net-(U1-Pad14)" "Net-(U5-Pad14)"
"Net-(Q1-Pad2)" "Net-(Q1-Pad1)" "Net-(Q2-Pad2)" "Net-(Q2-Pad1)" "Net-(Q3-Pad2)" "Net-(Q3-Pad1)" "Net-(Q4-Pad2)" "Net-(Q4-Pad1)"
"Net-(D1-Pad2)" "Net-(N1-Pad8)" "Net-(N1-Pad9)" "Net-(N1-PadA)" "Net-(N2-PadA)" "Net-(N3-Pad8)" "Net-(N3-Pad9)" "Net-(N3-PadA)"
"Net-(N4-PadA)" "Net-(N5-Pad8)" "Net-(N5-Pad9)" "Net-(N5-PadA)" "Net-(N6-PadA)" "Net-(U2-Pad3)" "Net-(U2-Pad6)" "Net-(U2-Pad7)"
"Net-(U3-Pad3)" "Net-(U3-Pad6)" "Net-(U3-Pad7)" "Net-(J4-Pad1)" "Net-(N7-PadK)" "Net-(N8-PadK)" "Net-(N9-PadK)" "Net-(N10-PadK)"
"Net-(U1-Pad2)" "Net-(U1-Pad15)" "Net-(U2-Pad4)" "Net-(U4-Pad4)" "Net-(D2-Pad2)" "Net-(D3-Pad2)" "Net-(D4-Pad2)" "Net-(D9-Pad2)"
"Net-(D10-Pad2)" "Net-(J1-Pad1)" "Net-(J2-Pad3)" "Net-(J2-Pad5)" "Net-(J2-Pad7)" "Net-(N6-Pad8)" "Net-(N6-Pad9)" "Net-(J2-Pad2)"
"Net-(J2-Pad6)" "Net-(N2-Pad4)" "Net-(N2-Pad5)" "Net-(N2-Pad6)" "Net-(N2-Pad7)" "Net-(N2-Pad8)" "Net-(N2-Pad9)" "Net-(N4-Pad8)"
"Net-(N4-Pad9)" "Net-(N6-Pad2)" "Net-(N6-Pad3)" "Net-(U1-Pad9)" "Net-(U3-Pad8)" "Net-(U6-Pad8)" "Net-(U9-Pad11)" "Net-(U9-Pad13)"
"Net-(U9-Pad8)" "Net-(U9-Pad16)" "Net-(U9-Pad1)" "Net-(U3-Pad10)" "Net-(U6-Pad10)" "Net-(U9-Pad10)"
(clearance_class "kicad_default")
(via_rule kicad_default)
(rule
(width 500.0)
)
(circuit
(use_layer F.Cu B.Cu)
)
)
)

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@ -1,4 +1,4 @@
(module nixiesp:russian-nixies-IN-12 (layer F.Cu) (tedit 59300CF0)
(module russian-nixies-IN-12 (layer F.Cu) (tedit 59629064)
(descr "MAY BE USED WITH SOCKET: SK-136")
(tags "MAY BE USED WITH SOCKET: SK-136")
(attr virtual)
@ -15,18 +15,17 @@
(fp_arc (start 0 0) (end -11 -11) (angle 90) (layer F.SilkS) (width 0.15))
(fp_line (start -11 11) (end -11 -11) (layer F.SilkS) (width 0.15))
(fp_line (start 11 -11) (end 11 11) (layer F.SilkS) (width 0.15))
(pad 0 thru_hole circle (at 5.75 4.5) (size 2.54 2.54) (drill 1.09982) (layers *.Cu F.Paste F.SilkS F.Mask))
(pad 1 thru_hole circle (at -4 8) (size 2.54 2.54) (drill 1.09982) (layers *.Cu F.Paste F.SilkS F.Mask))
(pad 2 thru_hole circle (at -5.75 4.5) (size 2.54 2.54) (drill 1.09982) (layers *.Cu F.Paste F.SilkS F.Mask))
(pad 3 thru_hole circle (at -5.75 0) (size 2.54 2.54) (drill 1.09982) (layers *.Cu F.Paste F.SilkS F.Mask))
(pad 4 thru_hole circle (at -5.75 -4.5) (size 2.54 2.54) (drill 1.09982) (layers *.Cu F.Paste F.SilkS F.Mask))
(pad 5 thru_hole circle (at -4 -8) (size 2.54 2.54) (drill 1.09982) (layers *.Cu F.Paste F.SilkS F.Mask))
(pad 6 thru_hole circle (at 0 -9) (size 2.54 2.54) (drill 1.09982) (layers *.Cu F.Paste F.SilkS F.Mask))
(pad 7 thru_hole circle (at 4 -8) (size 2.54 2.54) (drill 1.09982) (layers *.Cu F.Paste F.SilkS F.Mask))
(pad 8 thru_hole circle (at 5.75 -4.5) (size 2.54 2.54) (drill 1.09982) (layers *.Cu F.Paste F.SilkS F.Mask))
(pad 9 thru_hole circle (at 5.75 0) (size 2.54 2.54) (drill 1.09982) (layers *.Cu F.Paste F.SilkS F.Mask))
(pad A thru_hole circle (at 4 8) (size 2.54 2.54) (drill 1.09982) (layers *.Cu F.Paste F.SilkS F.Mask))
(pad LHDP thru_hole circle (at 0 9) (size 2.54 2.54) (drill 1.09982) (layers *.Cu F.Paste F.SilkS F.Mask))
(pad 0 thru_hole circle (at 5.75 4.5) (size 3 3) (drill 1.5) (layers *.Cu F.Paste F.SilkS F.Mask))
(pad 1 thru_hole circle (at -4 8) (size 3 3) (drill 1.5) (layers *.Cu F.Paste F.SilkS F.Mask))
(pad 2 thru_hole circle (at -5.75 4.5) (size 3 3) (drill 1.5) (layers *.Cu F.Paste F.SilkS F.Mask))
(pad 3 thru_hole circle (at -5.75 0) (size 3 3) (drill 1.5) (layers *.Cu F.Paste F.SilkS F.Mask))
(pad 4 thru_hole circle (at -5.75 -4.5) (size 3 3) (drill 1.5) (layers *.Cu F.Paste F.SilkS F.Mask))
(pad 5 thru_hole circle (at -4 -8) (size 3 3) (drill 1.5) (layers *.Cu F.Paste F.SilkS F.Mask))
(pad 6 thru_hole circle (at 0 -9) (size 3 3) (drill 1.5) (layers *.Cu F.Paste F.SilkS F.Mask))
(pad 7 thru_hole circle (at 4 -8) (size 3 3) (drill 1.5) (layers *.Cu F.Paste F.SilkS F.Mask))
(pad 8 thru_hole circle (at 5.75 -4.5) (size 3 3) (drill 1.5) (layers *.Cu F.Paste F.SilkS F.Mask))
(pad 9 thru_hole circle (at 5.75 0) (size 3 3) (drill 1.5) (layers *.Cu F.Paste F.SilkS F.Mask))
(pad A thru_hole circle (at 4 8) (size 3 3) (drill 1.5) (layers *.Cu F.Paste F.SilkS F.Mask))
(model ./IN-12B.wrl
(at (xyz 0.15 -0.3 0.3))
(scale (xyz 1 1 1))

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@ -1,4 +1,4 @@
(module russian-nixies:russian-nixies-IN-6 (layer F.Cu) (tedit 200000)
(module russian-nixies-IN-6 (layer F.Cu) (tedit 593E8B86)
(attr virtual)
(fp_text reference >NAME (at -0.3175 3.81 180) (layer B.SilkS)
(effects (font (size 1.27 1.27) (thickness 0.0889)))
@ -7,6 +7,6 @@
(effects (font (thickness 0.15)))
)
(fp_circle (center 0 0) (end -1.27762 1.27762) (layer F.SilkS) (width 0.127))
(pad A thru_hole circle (at -1.5875 0) (size 1.30556 2.61366) (drill 0.79756) (layers F&B.Cu F.Paste F.SilkS F.Mask))
(pad K thru_hole circle (at 1.58496 0) (size 1.30556 2.61366) (drill 0.79756) (layers F&B.Cu F.Paste F.SilkS F.Mask))
(pad A thru_hole circle (at -1.5875 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu F.Paste F.SilkS F.Mask))
(pad K thru_hole circle (at 1.58496 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu F.Paste F.SilkS F.Mask))
)